? semiconductor components industries, llc, 2000 march, 2000 rev. 3 1 publication order number: mc10h681/d
the mc10/100h681 is a dual supply hex ecl/ttl transceiver with latches in both directions. ecl controlled direction and chip enable bar pins. there are two latch enable pins, one for each direction. the ecl outputs are single ended and drive 50 w . the ttl outputs are specified to source 15 ma and sink 48 ma, allowing the ability to drive highly capacitive loads. the high driving ability of the ttl outputs make the device ideal for bussing applications. the ecl output levels are standard v oh and v ol cutoff equal to 2.0 v (v tt ). when the ecl ports are disabled the outputs go to the v ol cutoff level. multiple ecl v cco pins are utilized to minimize switching noise. the ttl ports have standard levels. the ttl input receivers have pnp input devices to significantly reduce loading. multiple ttl power and ground pins are utilized to minimize switching noise. the 10h version is compatible with mecl 10h ecl logic levels. the 100h version is compatible with 100k levels. ? separate latch enable controls for each direction ? ecl single ended 50 w i/o port ? high drive ttl i/o ports ? extra ttl and ecl power/ground pins to minimize switching noise ? dual supply ? direction and chip enable control pins pinout: 28lead plcc (top view) 1 567891011 25 24 23 22 21 20 19 26 27 28 2 3 4 12 13 14 15 16 17 18 tio2 vt gt tio1 vt gt tio0 eio5 v cco eio4 v cce eio3 v cco eio2 tio3 vt gt tio4 vt gt tio5 dir leet eio1 ceb lete eio0 v ee http://onsemi.com device package shipping ordering information mc10h681fn plcc28 37 units/rail marking diagram a = assembly location wl = wafer lot yy = year ww = work week plcc28 fn suffix case 776 10h681 awlyyww 1 mc100h681fn plcc28 37 units/rail
mc10h681, mc100h681 http://onsemi.com 2 pin symbol description 1 ti01 ttl i/o bit 1 2 vt ttl v cc (5.0 v) 3 gt cc () ttl gnd (0 v) 4 ti00 ttl i/o bit 0 5 6 dir ceb direction control (ecl) chi e bl b c l (ecl) 6 7 ceb leet chip enable bar control (ecl) l t h e bl ecl ttl c t l (ecl) 7 8 leet lete latch enable e c l-ttl c ontrol ( e c l ) latch enable ttl ecl control (ecl) 8 9 lete v ee l a t c h e na bl e ttl - ecl c on t ro l (ecl) ecl su pp ly ( 5 2 / 4 5 v) 9 10 v ee ei00 ecl s upp l y ( 5 . 2/ 4 . 5 v) ecl i/o bit 0 10 11 ei00 ei01 ecl i/o bit 0 ecl i/o bit 1 11 12 ei01 ei02 ecl i/o bit 1 ecl i/o bit 2 12 13 ei02 v cco ecl i/o bit 2 ecl v cc (0 v) e out p uts 13 14 v cco ei o3 ecl v cc (0 v) out uts ttl i /o bit 3 14 15 eio3 v cce ttl i/o bit 3 ecl v cc ( 0 v ) 15 16 v cce eio4 ecl v cc (0 v) ecl i/o bit 4 17 v cco ecl v cc (0 v) e outputs 18 cco eio5 cc () ecl i/o bit 5 19 ti05 ttl i/o bit 5 20 gt ttl gnd (0 v) () 21 22 vt ti04 ttl v cc (5.0 v) ttl i/o bit 4 22 23 ti04 gt ttl i/o bit 4 ttl gnd (0 v) 23 24 gt vt ttl gnd (0 v) ttl v cc (5 0 v) 24 25 vt tio3 ttl v cc (5 . 0 v) ttl i/o bit 3 25 26 tio3 tio2 ttl i/o bit 3 ttl i/o bit 2 26 27 tio2 vt ttl i/o bit 2 ttl v cc (5 0 v) 27 28 vt gt ttl v cc (5 . 0 v) ttl v cc (0 v) dir ce le-te tio d q 6 eio le-et 6 toe eoe qd le truth table ceb dir leet lete eout tout h x x x z z l h l l z ein l h h l z qo l l l l tin z l l l h qo z ? hex ? bi-directional ? ecl/ttl translation ? dual supply ? ecl outputs, 50 ohm s.e., v oh /cutoff ? ttl outputs, 48 ma sink, 15 ma source ? multi power and ground pins ? separate le controls
mc10h681, mc100h681 http://onsemi.com 3 ecl dc characteristics: v cct = + 5.0 v 10%, v ee = 5.2 5% (10h version) ; v ee = 4.2 v to 5.5 v (100h version) test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition i ee supply current/ecl e 113 e 113 e 113 ma i inh input high current e 225 e 145 e 145 m a i inl input low current 0.5 e 0.5 e 0.3 e m a v oh v ol output high voltage output low voltage 1020 2.1 840 2.03 980 2.1 810 2.03 920 2.1 735 2.03 mv v 50 w to 2.1 v 10h ecl dc characteristics: v cct = + 5.0 10%, v ee = 5.2 5% test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition v ih v il input high voltage input low voltage 1170 1950 840 1480 1130 1950 810 1480 1070 1950 735 1450 mv 100h ecl dc characteristics: v cct = + 5.0 10%, v ee = 4.2 v to 5.5 v test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition v ih v il input high voltage input low voltage 1165 1810 880 1475 1165 1810 880 1475 1165 1810 880 1475 mv absolute ratings (do not exceed): power supply voltage v ee (ecl) 8.0 to 0 vdc power supply voltage v cct (ttl) 0.5 to + 7.0 vdc input voltage v i (ecl) v i (ttl) 0.0 to v ee 0.5 to + 7.0 vdc disabled 3-state output v out (ttl) 0.0 to v cct vdc output source current continuous i out (ecl) 100 madc output source current surge i out (ecl) 200 madc storage temperature t stg 65 to 150 c operating temperature t amb 0.0 to + 75 c
mc10h681, mc100h681 http://onsemi.com 4 ttl dc characteristics: v cct = + 5.0 v 10%, v ee = 5.2 5% (10h version) ; v ee = 4.2 v to 5.5 v (100h version) test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition v ih v il standard input standard input 2.0 e e 0.8 2.0 e e 0.8 2.0 e e 0.8 vdc v ik input clamp e 1.2 e 1.2 e 1.2 vdc i in = 18 ma v oh output high voltage output high voltage 2.5 2.0 e e 2.5 2.0 e e 2.5 2.0 e e v i oh = 3.0 ma i oh = 15 ma v ol output low voltage e 0.55 e 0.55 e 0.55 v i ol = 48 ma i ih /i ozh i il /i ozl output disable current e e 70 200 e e 70 200 e e 70 200 m a v out = 2.7 v v out = 0.5 v i ccl supply current e 63 e 63 e 63 ma i cch supply current e 63 e 63 e 63 ma i ccz supply current e 63 e 63 e 63 ma i os output short circuit current 100 225 100 225 100 225 ma v out = 0 v ecl to ttl direction ac characteristics test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition t plh t phl propagation delay to output 4.0 7.8 4.0 7.8 4.2 8.0 ns c l = 50 pf t plh t phl leet to output 5.5 5.5 8.3 7.6 5.5 5.5 8.3 7.6 5.7 5.8 8.5 8.0 ns c l = 50 pf t pzh t pzl ceb to output enable time 5.5 5.3 8.3 8.3 5.5 5.3 8.3 8.3 4.7 5.4 8.5 8.4 ns c l = 50 pf t phz t plz ceb to output disable time 3.5 3.5 7.2 5.3 3.5 3.5 7.2 5.3 3.7 4.1 7.3 5.8 ns c l = 50 pf t r /t f 1.0 vdc to 2.0 vdc 0.4 2.2 0.4 2.2 0.4 2.2 ns c l = 50 pf ttl to ecl direction ac characteristics test t a = 0 c t a = 25 c t a = 75 c test symbol parameter min max min max min max unit condition t plh t phl propagation delay to output 1.9 3.9 1.9 3.9 2.2 4.4 ns 50 w to 2.0 v t phl t plh ceb to output 2.2 2.3 4.0 4.6 2.2 2.3 4.0 4.6 2.5 2.7 4.3 5.0 ns 50 w to 2.0 v t phl t plh lete to output 2.4 3.9 2.4 3.9 2.7 4.3 ns 50 w to 2.0 v t r /t f output rise/fall time 20% 80% 0.4 2.2 0.4 2.2 0.4 2.2 ns 50 w to 2.0 v
mc10h681, mc100h681 http://onsemi.com 5 50 w coax v ee v cc & v cco in out oscilloscope ch a ch b coax 50 w use 0.1 m f capacitors for decoupling. use oscilloscope internal 50 w load for termination. 50%/1.5 v v in t pd++ t pd 50%/1.5 v v out v out t rise t fall 80%/2.0 v 20%/1.0 v device under test pulse generator coax 50 w test circuits and waveforms ecl device under test 50 pf r2 500 w r1 500 w all others +7 v open t pzl , t plz ttl figure 4. propagation delay e single ended ecl/ttl figure 3. rise and fall times ecl/ttl figure 5. 3-state output low enable and disable times ttl figure 6. 3-state output high enable and disable times ttl ve ve 1.5 v 1.5 v 1.5 v tplz t pzl v out v ol 0.3 v ve ve 1.5 v 1.5 v 1.5 v t phz t pzl v out v oh 3.5 v 0.3 v > figure 1. test circuit ecl figure 2. test circuit ttl
mc10h681, mc100h681 http://onsemi.com 6 package dimensions plcc28 fn suffix plastic plcc package case 77602 issue d notes: 1. datums l, m, and n determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum t, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). n m l v w d d y brk 28 1 view s s lm s 0.010 (0.250) n s t s lm m 0.007 (0.180) n s t 0.004 (0.100) g1 g j c z r e a seating plane s lm m 0.007 (0.180) n s t t b s lm s 0.010 (0.250) n s t s lm m 0.007 (0.180) n s t u s lm m 0.007 (0.180) n s t z g1 x view dd s lm m 0.007 (0.180) n s t k1 view s h k f s lm m 0.007 (0.180) n s t dim min max min max millimeters inches a 0.485 0.495 12.32 12.57 b 0.485 0.495 12.32 12.57 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.019 0.33 0.48 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 0.51 k 0.025 0.64 r 0.450 0.456 11.43 11.58 u 0.450 0.456 11.43 11.58 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y 0.020 0.50 z 2 10 2 10 g1 0.410 0.430 10.42 10.92 k1 0.040 1.02
mc10h681, mc100h681 http://onsemi.com 7 notes
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